Xilinx Ill-Communication

September 22, 2008, Semiconductors, Tech Investing — @ 10:54 pm

Xilinx recently put out a press release publicizing their partnership with Sun Microsystems. The frustrating part of the release is it accentuates Xilinx inability to articulate its platform strategy. An excerpt from EE Times (a pretty techy organization) coverage of the press release illustrates this.

Xilinx said in a statement. “The microprocessor industry is steadily shifting towards CMT architectures”… It is thought that Knudsen was referring to processors that support multiple threads of computation on a single chip as in chip-multi-threading (CMT) but the acronym was not expanded.

I have a fairly good mental library of acronyms, but “CMT” isn’t one I readily recognize. When technical publications struggle to decipher a company’s lingo it indicates the company has some work to do in the marketing department. Xilinx has a very enviable position that they are struggling to leverage or communicate.

The PLD (Programmable Logic Device) industry badly needs to create a “Web 2.0″ type marketing headline that can energize engineers, designers, managers, and venture capitalists. Otherwise PLDs may stagnate in their current niche with market adjacencies continuing to be dominated by ASSPs (Application Specific Standard Products). Potential alone isn’t a recipe for success. People need inspiration to change habits away from the traditional approach.

Altera & Xilinx, the Battle Continues…

July 17, 2008, Semiconductors, Tech Investing — @ 1:37 am

The past two days Xilinx and Altera have each reported quarterly results for their June quarter. The market reacted much more positively to Altera’s results sending the company’s shares up 12% yesterday. This is largely due to Xilinx long-term strategy still being fairly opaque. Overall both company’s results were quite good. Altera had a great quarter and in many respects appears better positioned. However, Xilinx may be building the ground work for a game changing announcement later this year.

Earlier this year I outlined how digital products are increasingly migrating to Xilinx and Altera’s FPGAs due to the strong platforms offered by these companies; enabling convergence in semiconductor design. Let me provide an update based on the June quarter results from these two highly profitable companies who control over 80% of the FPGA market.

Altera won this quarters battle

Historically Altera has had better margins and a much higher return on equity. A week ago Zack’s semiconductor analyst Abdul Saleh put out a timely buy recommendation on Altera referencing Altera’s:

  • HardCopy structured ASICs, the leading structured ASIC products
  • Partnership with Taiwan Semiconductor (TSM) which is allowing them to leapfrog Xilinx to 40nm
  • And of course beating the drum of FPGA’s replacing ASICs

Along with these points I think Altera’s growth will be driven through its partnership with ARM (for software processors) and its low power leadership. The partnership with TSM is a big deal. Altera and Xilinx are both fabless which means they outsource the actual manufacturing of their chips. TSM controls approximately half of the semiconductor manufacturing market. Intel has historically had the premier manufacturing facilities. TSM’s foundries are starting to have nearly equivalent capability demonstrated by their ability to produce 40nm FPGA’s later in the year.

Novice note: The smaller process node (for now fewest nanometers) a company can use to manufacture their chips the more powerful the chip can be.

Altera’s Q2 2008 Results (released July 15, 2008)

Financial Highlights
  • Revenue = $359.9M, up 7%, up 13% Q/Q
    • FPGA growth up 18% (9% Q/Q)
    • 90-nm FPGAs were largest growth drivers
    • 65-nm FPGA up over 100% Q/Q
  • Net Income = $98M up 22% / $.32 up 43%

 

“The combination of solid top line growth, continued gross margin improvement, and lower than planned operating expense created significant operating leverage…We are on schedule to ship the industry’s first 40-nm Stratix IV FPGAs [with up to 13.3M gates] later this year…hundreds of early adopter customers have already begun designs with these devices”

        - John P. Daane, Altera’s CEO

Operating Highlights
  • Altera is gaining market share and should continue to do so
  • For the first time Altera believes it has architectural leadership and process technology leadership
  • Book to bill was slightly below one at Q2 end, but has since accelerated over one
  • Rockwell Collins, a top-tier government electronics contractor, recognized Altera as the number-one supplier among its more than 10,000 suppliers
  • Cash = $1.2B / LT debt = $500M
  • Quarterly Dividend = $.05
Guidance: Q3 2008
  • Revenue: Flat to down 3%
  • Gross Margin: 66.5 - 67.5%

Altera was very upbeat; this was their first conference call in some time where the economy was not one of the major discussion points. Altera is benefitting from a couple relatively new markets showing strong growth: Automotive customers are moving from prototype to production cycles and the government now accounts for 7-8% of revenue.

Xilinx is still winning the war, for now…

Xilinx was less upbeat, but also did not seem too concerned about the economy. Xilinx deflected questions comparing Altera’s growth with its own by discussing how Altera dominated the 130 nanometer process node, which is now peaking; even though Altera’s results appeared to be driven by the adoption of its 65nm and 90nm products. In the next couple years 65nm and 90nm products should begin peaking. Xilinx currently has the majority of market share at 90nm and it supplies 90% of the FPGA industry’s 65nm sales. Xilinx’s mid-term future looks very bright with its dominance at the 65 nanometer node. However, Altera’s momentum is making up for some of the initial market share loss due to the delay in their migration to these smaller process nodes.

Analysts are concerned that Altera beat Xilinx to 40nm. This is surprising based on Xilinx’s much faster migration to 65nm. A few years ago Altera delayed their product launches because of a re-design focusing on low power consumption by unveiling what they call programmable power. Since then Altera has definitely benefitted from this low power leadership. This time it appears Xilinx is doing a re-design, to focus on its platform strategy.

Xilinx’s Q1 2009 Results (released July 16, 2008)

Financial Highlights
  • Revenue = $488.2M up 9%, up 3% Q/Q
    • New Products up 15% Q/Q (now 42% of sales, up from 28% in Q1 2008)
  • Net Income = $108M / $.37 (vs. $96.5M / $.34 last quarter)
    • Not including a pre-tax restructuring charges of $19.5M and pre-tax charge of $4.6M related to impairment losses on equity investments
  • Operating Cash Flow = $158M
Operating Highlights
  • Gross margin = 63.8%, up from 63.4% last quarter and 62.2% in Q1 2008
  • YTD has repurchased $350M shares
  • Quarterly Dividend = $0.14 a share (up from $.12 last quarter and Q1 2008)
  • Cash ($1.24B) + LT Investments ($607M) - Convertible ($1B) = $831M
Guidance: Q2 2009
  • Revenues: up 1% to down 3% Q/Q
  • Gross margin: 63 - 64%

For years Willem Roelandts, Xilinx’s former CEO now chairman, advocated FPGAs as a platform for 3rd party IP. Currently developers still get most of the IP (intellectual property) directly from the FPGA vendors or by building it themselves. Xilinx’s new CEO, Moshe Gavrielov, is beating the same drum of 3rd party IP. Soon after joining the company this year he articulated how it now costs $70 million to design a new ASSP, using the latest process node. This requires a billion dollar plus market for such an endeavor to be viable.

Xilinx believes they need to focus less on being a technology innovator in order to create market opportunities, but instead pursue a business platform leadership position. This strategy appears to make sense since the last couple years analysts have pondered why ASIC designs have not seen a mass migration to FPGAs as expected. Instead ASIC starts have migrated more to ASSP products. This creates a huge opportunity for platform FPGAs to take market share from mid to low volume ASSPs.

This is not a war of attrition

Altera’s strategy is clear. Leverage its low power leadership and relationship with TSM to create the most advanced FPGAs that can be migrated to its structured ASIC product. Xilinx strategy is yet to be fully unveiled, but it is focused on building a platform that vendors can use to create IP and end products that will compete directly with lower volume ASSPs and IP now designed for ASICs/ASSPs.

No longer is Xilinx strategy to focus primarily on technical innovation to create market opportunity, but instead to focus on customer requirements to fill a technological product void. This year Xilinx has re-structured the entire organization around creating vertical platforms (devices that basically compete directly with ASSPs and microcontrollers) and horizontal platforms (generic platform devices).

Such platforms for ASSP and microcontroller replacement will require using standard soft-cores within a powerful FPGA for ease of use by end product device developers and easy IP migration to newer chips. In many respects this strategy relies more on Xilinx’s ability to build a platform ecosystem of vendors and 3rd party IP providers than offering the most cutting edge performance. Unfortunately for investors, Xilinx has yet to announce exactly how it intends to accomplish the task of building this platform ecosystem.

Both companies can be successful. Neither company has interest in starting a price war. Each company has thousands of legacy customers that are not looking to switch vendors.

While I personally think this recession overall will be one of the most severe in decades I think it will be relatively minor for the technology industry; compared to the 2001 technology-led recession. The semiconductor industry is a leading indicator for the technology sector. In their conference calls both companies showed minimal concerns about the economy affecting their business. This is a reassuring sign for the technology sector.

Disclosure: I own a little more XLNX than ALTR. I will reconsider this allocation based on Xilinx’s platform and process node announcements later this year. I have investments in no other company mentioned.

Next Generation Semiconductor Design

June 22, 2008, Editor Picks, Semiconductors, Tech Investing — @ 10:45 pm

I was pleased that Seeking Alpha published a summary of my paper on the Next Generation of Semiconductor Design and honored that they made it an Editors Pick. Over the past couple years I’ve find Seeking Alpha to easily be the best source for investment ideas. On my Seeking Alpha post I put a follow up comment that did not include some links so I thought I would re-post it here.

 

To help clarify, Xilinx and Altera have platforms that their clients develop products on top of and Xilinx and Altera make money by selling chips that go into these end products. While it is true that Microsoft needs to care about the layman’s needs, Xilinx and Altera only need to support engineers due to the nature of their products.

As for whether Xilinx or Altera is in a better position the simple answer would be Xilinx since they have a larger market share and currently appear to have more mindshare. Of course, things are rarely that simple. Altera has better margins and has made some great moves the last couple years such as: partnering with ARM, designing for power management, and having the best path to structured ASICs.

Both Xilinx and Altera have independently discussed that future growth is in adjacent markets not fighting a battle of attrition between each other; such is the benefit of a duopoly. It typically takes two years from design win to volume production and I don’t expect meaningful revenue growth in the PLD industry for about a year and a half. Right now I don’t see a major difference in design wins between the two companies, but that could change.

I think both companies are a great value at the current price and I intend, as best as I can, to track the design wins for these two firms. That will be the leading indicator of who will benefit from the next wave of end product innovation. For the foreseeable future the market can support two major PLD companies and the first losers will be those in adjacent markets.

Semiconductor Design Platforms Conclusion

June 16, 2008, Semiconductors, Tech Investing — Tags: , , — @ 5:08 pm

The platform aspects of Xilinx and Altera’s business model do not require that the companies offer the best of breed technology; although they often do. The PLD (programmable logic market) market is not prone to the extreme price competition seen in the ASIC (application specific integrated circuit), generic processor, and memory markets due to the high barriers to entry caused by the required software platforms and the lock-in once a vendor selects a PLD design platform. This makes the two dominant PLD vendors, who control over 80% of the market, very profitable with net margins over 20%.

The PLD market will see solid growth for years once several macro trends emerge causing a tipping point in PLD demand. These emerging trends are

  • The increasing complexity of new semiconductor devices
  • The new markets for PLDs due to microprocessor performance barriers and dramatically shortened end product lifecycles
  • The maxing out of the current communications infrastructure
  • World-wide growth due to globalization, potentially temporarily restrained due to a US consumer led recession

Semiconductors often act as a leading indicator for the technology industry. Xilinx and Altera are up 27% and 18% respectively this year after several years of their stocks floundering with negative returns. With Xilinx and Altera’s accelerating design wins it appears the still have considerable room to run.

If you have any questions or comments related to the posts from this paper shoot me an e-mail. You can view our entire paper on the Next Generation of Semiconductor Design or use the links below to jump to specific posts from the paper.

Part 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14

Programmable Logic - New Markets

June 8, 2008, Semiconductors, Tech Investing — Tags: , , — @ 8:55 pm

In the previous two posts on why semiconductor solutions are converging and why this is a great opportunity for FPGAs. I explained this was occurring because of increasing semiconductor complexity and physical barriers. Below are two new end market opportunities as a result of increased digital IC complexity and physical barriers.

FPGAs in Supercomputers

FPGA’s have moved into supercomputers as the enabler of Reconfigurable Computing. Like any change in the marketplace, reconfigurable computing also represents a risk. Companies like Stretch are creating FPGA like software configurable microprocessors, but how straight-forward will engineers find the design tools?

The architecture for a RPU (reconfigurable processor unit) system is just now becoming standardized. While FPGAs theoretically have the ability to be reprogrammed at run-time software development tools have not supported this. While some proprietary systems, such as Cray’s FPGA-augmented XD1 and SGI’s Altix with RASC option, have seen limited success it appears FPGA’s may finally be entering the standard x86 market.

FPGAs entering the IT (PC/Server) Market

The reconfigurable computing data-stream-driven model may alleviate many of the performance barriers in the existing x86 server market. As prices fall and the speed of a single processor core stabilizes it is not farfetched to see FPGA’s in desktop PC’s and cell phones. A PC manufacturer may decide to use a FPGA chip to implement common tasks such as TCP/IP processing.

Xilinx and Altera are working with Intel and AMD to plug directly into new multi-core processor’s front-side bus architecture. We may start to see PLD products for this as early as mid-2008.

Both Intel and AMD have developed their own technique to allow PLD’s to plug into the PC architecture. In June 2006, AMD announced its Torrenza program creating an interface to plug into its proprietary HyperTransport CPU bus. Not to be left behind, Intel, along with IBM and others, in September 2006 announced Geneseo an open source project creating a set of extensions to PCI Express aiming to help graphics chips and other accelerators. Geneseo proposals aim to extend Express in four general areas: fine-grained power management, locking shared memory, hints to help coherent processor handle I/O more effectively, and efficiencies for mapping virtual to physical memory.

 

PC and server architectures are highly standardized alleviating many of the advantages of PLDs. However, as computers take over more real-time computing functions, like processing high definition video signals, there may be more of a need to balance the inflexible speed of ASICs and the flexible sluggishness of software for x86 processors. Some examples of new real-time PC computing functions could be replacing proprietary PBX systems with generic servers running unified communications software or streaming video from a home server appliance.

Semiconductor Design Changes

June 7, 2008, Semiconductors, Tech Investing — Tags: , , — @ 8:00 pm

This is my second of three posts on why semiconductor solutions are converging and why this is a great opportunity for FPGAs.

The Memory wall

For well over a decade processor speed has been increasing more than memory speed, because much more R&D has been poured into logic and processor design. This is because logic (Broadcom, Xilinx, Altera) and processor designers (Intel, IBM) have far better margins than memory designers (Micron, Spansion, Samsung).

Physical Barriers

It is apparent that for servers the application performance improvement curve is flattening. Intel’s generic microprocessor architecture has overtaken many RISC processors because of the shear R&D money Intel has dumped into its x86 design and manufacturing compared to RISC makers. Even so, Intel is no longer dramatically increasing the speed of its processors.

Intel is only able to keep up with Moore’s Law by adding more processors. Inefficiencies abound from using multiple processors. Programmers are not taking full advantage of these multi-core and multi-processor machines because these machines are not offering the proper development platforms and compilers for object-oriented programmers to optimize for multi-core, multi-processor environment. Additionally managing memory in these multi-core architectures is more challenging. Moore’s law is running into an instruction set wall because the data stream is too large.

Physical barriers (like transistor leakage) are inhibiting the ability for semiconductor companies to continue keeping pace with Moore’s Law. To keep up with Moore’s Law microprocessor designers are forced to build up by adding more processors. Processor manufacturers’ ability to scale clock speed and shrink transistors is decelerating. They must now use parallelism.

Semiconductor Design Convergence

June 5, 2008, Semiconductors, Tech Investing — Tags: , , , — @ 3:18 am

In my next three posts I’ll wrap up my series on Investment Opportunities in the Next Generation of Semiconductor Design. In these three posts I’ll cover why semiconductor solutions are converging and why this is a great opportunity for FPGAs.

Convergence of Software Design Platforms

Programming many-core microprocessors and FPGAs is also a problem of educational deficits and development platform shortcomings. The developer’s choice here may ultimately be decided by who builds the simpler development platform or raises the level of abstraction through powerful framework IP.

Where the innovation is made will make all the difference. Will embedded systems use Platform FPGAs, dedicated microprocessors, or DSPs? With globalization and the Internet; China, India, Russia, and Eastern Europe are producing hundreds of thousands to millions of engineers. Altera has over 30 joint laboratory and training centers in China, but it is not alone as Xilinx and other major semiconductor firms are working to get the next generation of engineers to learn and innovate on their platform. What development platform will win the minds of the next innovators?

Competition is migrating from semiconductor companies solely competing based on their IC based on the platform they offer. Microchip is a successful example of this strategy. When the innovation in the IC slows the innovation moves to the platform; and the efficiency it bequeaths on the end product designer.

The information technology departments and particularly web software developers have discovered and embraced agile project development methodology. Rapidly shrinking product lifecycles are encouraging digital product designers to embrace similar prototype and release agile strategies.

Platform FPGAs as SoC

As chips become more complex their design and manufacturing costs increase dramatically. More requirements require a complex design which produces more functionality to test and debug, and a more complex design triggers lower yields and higher NRE in the manufacturing stage. Embedded systems are being designed around SoC. Industrial, automotive, and consumer electronics devices are increasingly becoming digitized.

Another example of an FPGA SoC is HDTVs. Most HDTV are now designed with a stand-alone FPGA or coupling an FPGA with an ASSP as a coprocessor. These Platform FPGAs include hard-coded DSP blocks, internal memories, and standard IP blocks along with the programmable logic.

High-end convergence consumer devices are a great opportunity for FPGAs. In addition, the growth in internet traffic is will create another round of build-out in the FPGA industry’s sweet spot, telecom and networking.

In 2008 products built around an FPGA will be delivered. What will be new is that for the first time some of these products will be built on an industry-standard soft-core processor architecture from ARM which ARM released in 2007 specifically for FPGAs. Now the huge base of ARM engineers can develop software for embedded systems based on a FPGA system-on-a-chip and use the massive installed base of ARM software and tools. Will adding an ARM processor and its accompanying ecosystem to the FPGA platform be the inflection point for FPGA design wins and the growth that inevitably follows?

Programmable Logic Market Risks

June 3, 2008, Semiconductors, Tech Investing — Tags: , , , — @ 2:27 am

This is my last post related to the potential risks to Xilinx and Altera’s continued market dominance in programmable devices and growth into adjacent semiconductor industries in my 14 post piece on investment opportunities in semiconductor design. To summarize the other risks where

  • Competition from other Platforms
  • Existing Competitors and new entrants
  • Competition from ASICs and reliance on the communications sector

The Semiconductor Industry is Cyclical

Due to the .com and telecom bubble PLD sales surpassed economical sense in 2000 and 2001. After bottoming in 2002 PLD sales have grown at a compound annual rate of about 15% and FPGA sales have grown roughly 20% annually. FPGA’s are now 75% of total PLD sales. In 2001, the PLD market peaked at $4.1B and in 2002 bottomed at $2.3B. Since 2002, both Altera and Xilinx have gained market share every year. The PLD market has only recently exceeded the peak experienced in 2001.

It looks like the economy is headed back into a recession, but unlike the 2001 recession, which was business capital spending induced, this recession looks like it will be driven by a drop in consumer spending. This will affect semiconductor sales, but it will not be nearly as dramatic as the drop in 2001. Although some firms may experience financing issues, companies are for the most part well capitalized.

The 2001 recession was caused by a glut in supply of technology products and an over investment in technology oriented startups. The 2008 recession has neither of these characteristics.

In 2001, companies like, Xilinx, Altera, Cisco, EMC, Sun Microsystems, etc sold (and often helped finance) products to startups and other customers in the technology sector whose unprofitable business models caused them to go bankrupt when the market turned down and venture capital investment dried up. These bankrupt or dramatically downsized companies dumped their newly purchased technology products on the market. So not only had demand decreased drastically; supply increased drastically; causing a glut in the market that took years to work through.

This time supply chains have been optimized for just in time product delivery and technology companies’ balance sheets have never been stronger; often in conjunction with record low sales to inventory ratios. While there may be some re-selling of technology equipment in emerging markets it should be minimal compared to what occurred in the telecom and .net bubble of 2001. In addition, within the semiconductor industry, PLD sales should fare better than most since they require less up front risks, such as time and costs.

With rational supply and persistent growth in data storage, networking, and the digitization of industrial components this recession will look much different than the technology led recession of 2001. Recessions also spur new cost cutting or risk reduction strategies. Companies that have solely relied on ASICS or generic PC architectures may explore the benefits of programmable logic.

Programmable Logic, Communication Sector Dependence

June 2, 2008, Semiconductors, Tech Investing — Tags: , , , , , — @ 12:23 am

In the last post two posts on semiconductor design I reviewed the risks to Altera and Xilinx due to competition from other platforms, existing competitors, and new entrants. Here I’ll review the risks from reliance on the communication sector (which may finally be a strength for the first time since early 2000) and from ASIC vendors.

Competition from Structured ASICS and ASSP’s

In March 2006, LSI Logic, the first vendor to create a structured ASIC, closed its RapidChip division exiting the structured ASIC business. This was a blow to the EDA vendors who haven’t seen significant growth since the 2001 downturn and have struggled to gain a foothold in the FPGA industry. By shuttering its structured ASIC division LSI conceded that customers are moving to FPGA’s for new products as it is much faster and more economical to initially design a Xilinx (or Altera) FPGA and migrate to the same vendor’s structured ASIC in volume, than design using LSI’s ASIC-based process.

In 2001, Altera introduced their HardCopy® structured ASIC platform and they are now a leader in the structured ASIC market. Altera has a straightforward migration path from FPGA to structured ASIC. They maintain compatibility with the FPGA architecture, but reduce the die size by removing the configuration circuitry, programmable routing, and programmability for logic and memory with fixed wired interconnect. Xilinx has a similar product called EasyPath®.

Reliance on Communications Sector

In 2000, over 80% of PLDs went into communications related equipment. Today that number is just under 50% of sales and steadily dropping. Since 2000 the growth in PLDs for communications end products has significantly trailed other end markets.

In fact, if the growth in the communication sector picks up, like we think it will in 2010 or 2011, this could be a major boost to the PLD market. The other end market segments like storage, industrial, and consumer electronics should continue to see strong growth over the next decade.

Semiconductor Design Platform Competitors

May 31, 2008, Semiconductors, Tech Investing — Tags: , , , , , , — @ 6:33 pm

In the last post I reviewed the risks to Altera and Xilinx due to competition from other platforms. In this post I’ll review the risks from existing competitors and new entrants.

PLD Market: Existing Competitors Gain Momentum

Actel with 6% market share has a strong niche in anti-fuse FPGAs (one time programmable) and in flash based FPGAs. Flash based FPGAs is a segment Xilinx and Altera have stayed away from, but February 2007 Xilinx’s introduced a flash-based Spartan-3AN and was named to EDN’s Hot 100 Products of 2007.

There have been many new entrants with Flash based FPGAs in recent years as venture capitalists and entrepreneurs may feel more compelled to compete in a corner of the market not dominated by one of the two industry leaders. Flash-based FPGAs have entering several new markets end markets and they may actually grow faster than the more traditional SRAM-based FPGAs.

Actel began shipping a Flash based FPGA in 1999 and they appear to currently have a strong leadership position in this good niche area of the FPGA market. Actel has a deal with ARM for putting soft versions of ARM7 processors in Actel’s non-volatile flash-based FPGAs. Altera recently began offering FPGAs that also support ARM processors.

Flash benefits from being non-volatile (e.g. it doesn’t need power to maintain the chip’s data), but SRAM devices will always be faster. Unlike SRAM based FPGAs, Flash based FPGAs do not have to be booted by an external device to load the software so they are more of a true single chip solution comparable to ASICs (related to power requirements and the number of components in circuit board design).

Lattice Semiconductor with 7% market share has made acquisition to attempt to increase its share in the PLD market. Having these diverse PLD software development platforms for its various acquisitions has been a disadvantage. In 2001, Lattice’s division Vantis and Agere (at the time Lucent) gave it a 25% market share in the PLD market. Lattice is strongest in the slower growing CPLD segment where it is number three in market share after being over taken by Xilinx in 2007 for the number two position. Altera is number one in CPLD market share.

QuickLogic with 1% market share targets specific applications (similar to ASSP’s) and is strong in power sensitive markets.

PLD Market: New Entrants

Newer companies such as ChaoLogix, Stretch, and Cswitch are entering the programmable logic space and trying to create a disruptive, game changing technology.

A big problem for start-ups and other semiconductor companies entering the programmable logic market is place and route tooling software, where Xilinx and Altera’s design platforms are dominant. Roelandts the CEO of Xilinx has stated that “there is no 3rd party place and route software; place and route software at Xilinx runs to 20 million lines of code.” A new company also runs into the problem that initially no one knows its development platform and the lack of IP available for the startups chips.

A larger better funded player like Intel, IBM, or Texas Instruments enters the market. With the Geneseo project Intel and IBM opened sourced what could have been a competitive advantage for them (discussed in a couple pages). A risk could be a strong player like Texas Instruments, with its current powerful position in analog and DSP, purchasing Actel to get a foothold in the PLD market.

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