FPGA « Platform Concepts

Semiconductor Design Platforms Conclusion

June 16, 2008, Semiconductors, Tech Investing — Tags: ALTR, FPGA, XLNX — @ 5:08 pm

The platform aspects of Xilinx and Altera’s business model do not require that the companies offer the best of breed technology; although they often do. The PLD (programmable logic market) market is not prone to the extreme price competition seen in the ASIC (application specific integrated circuit), generic processor, and memory markets due to the high barriers to entry caused by the required software platforms and the lock-in once a vendor selects a PLD design platform. This makes the two dominant PLD vendors, who control over 80% of the market, very profitable with net margins over 20%.

The PLD market will see solid growth for years once several macro trends emerge causing a tipping point in PLD demand. These emerging trends are

The increasing complexity of new semiconductor devices
The new markets for PLDs due to microprocessor performance barriers and dramatically shortened end product lifecycles
The maxing out of the current communications infrastructure
World-wide growth due to globalization, potentially temporarily restrained due to a US consumer led recession

Semiconductors often act as a leading indicator for the technology industry. Xilinx and Altera are up 27% and 18% respectively this year after several years of their stocks floundering with negative returns. With Xilinx and Altera’s accelerating design wins it appears the still have considerable room to run.

If you have any questions or comments related to the posts from this paper shoot me an e-mail. You can view our entire paper on the Next Generation of Semiconductor Design or use the links below to jump to specific posts from the paper.

Part 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14

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Programmable Logic - New Markets

June 8, 2008, Semiconductors, Tech Investing — Tags: ALTR, FPGA, XLNX — @ 8:55 pm

In the previous two posts on why semiconductor solutions are converging and why this is a great opportunity for FPGAs. I explained this was occurring because of increasing semiconductor complexity and physical barriers. Below are two new end market opportunities as a result of increased digital IC complexity and physical barriers.

FPGAs in Supercomputers

FPGA’s have moved into supercomputers as the enabler of Reconfigurable Computing. Like any change in the marketplace, reconfigurable computing also represents a risk. Companies like Stretch are creating FPGA like software configurable microprocessors, but how straight-forward will engineers find the design tools?

The architecture for a RPU (reconfigurable processor unit) system is just now becoming standardized. While FPGAs theoretically have the ability to be reprogrammed at run-time software development tools have not supported this. While some proprietary systems, such as Cray’s FPGA-augmented XD1 and SGI’s Altix with RASC option, have seen limited success it appears FPGA’s may finally be entering the standard x86 market.

FPGAs entering the IT (PC/Server) Market

The reconfigurable computing data-stream-driven model may alleviate many of the performance barriers in the existing x86 server market. As prices fall and the speed of a single processor core stabilizes it is not farfetched to see FPGA’s in desktop PC’s and cell phones. A PC manufacturer may decide to use a FPGA chip to implement common tasks such as TCP/IP processing.

Xilinx and Altera are working with Intel and AMD to plug directly into new multi-core processor’s front-side bus architecture. We may start to see PLD products for this as early as mid-2008.

Both Intel and AMD have developed their own technique to allow PLD’s to plug into the PC architecture. In June 2006, AMD announced its Torrenza program creating an interface to plug into its proprietary HyperTransport CPU bus. Not to be left behind, Intel, along with IBM and others, in September 2006 announced Geneseo an open source project creating a set of extensions to PCI Express aiming to help graphics chips and other accelerators. Geneseo proposals aim to extend Express in four general areas: fine-grained power management, locking shared memory, hints to help coherent processor handle I/O more effectively, and efficiencies for mapping virtual to physical memory.

PC and server architectures are highly standardized alleviating many of the advantages of PLDs. However, as computers take over more real-time computing functions, like processing high definition video signals, there may be more of a need to balance the inflexible speed of ASICs and the flexible sluggishness of software for x86 processors. Some examples of new real-time PC computing functions could be replacing proprietary PBX systems with generic servers running unified communications software or streaming video from a home server appliance.

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Semiconductor Design Changes

June 7, 2008, Semiconductors, Tech Investing — Tags: ALTR, FPGA, XLNX — @ 8:00 pm

This is my second of three posts on why semiconductor solutions are converging and why this is a great opportunity for FPGAs.

The Memory wall

For well over a decade processor speed has been increasing more than memory speed, because much more R&D has been poured into logic and processor design. This is because logic (Broadcom, Xilinx, Altera) and processor designers (Intel, IBM) have far better margins than memory designers (Micron, Spansion, Samsung).

Physical Barriers

It is apparent that for servers the application performance improvement curve is flattening. Intel’s generic microprocessor architecture has overtaken many RISC processors because of the shear R&D money Intel has dumped into its x86 design and manufacturing compared to RISC makers. Even so, Intel is no longer dramatically increasing the speed of its processors.

Intel is only able to keep up with Moore’s Law by adding more processors. Inefficiencies abound from using multiple processors. Programmers are not taking full advantage of these multi-core and multi-processor machines because these machines are not offering the proper development platforms and compilers for object-oriented programmers to optimize for multi-core, multi-processor environment. Additionally managing memory in these multi-core architectures is more challenging. Moore’s law is running into an instruction set wall because the data stream is too large.

Physical barriers (like transistor leakage) are inhibiting the ability for semiconductor companies to continue keeping pace with Moore’s Law. To keep up with Moore’s Law microprocessor designers are forced to build up by adding more processors. Processor manufacturers’ ability to scale clock speed and shrink transistors is decelerating. They must now use parallelism.

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Semiconductor Design Convergence

June 5, 2008, Semiconductors, Tech Investing — Tags: ALTR, Convergence, FPGA, XLNX — @ 3:18 am

In my next three posts I’ll wrap up my series on Investment Opportunities in the Next Generation of Semiconductor Design. In these three posts I’ll cover why semiconductor solutions are converging and why this is a great opportunity for FPGAs.

Convergence of Software Design Platforms

Programming many-core microprocessors and FPGAs is also a problem of educational deficits and development platform shortcomings. The developer’s choice here may ultimately be decided by who builds the simpler development platform or raises the level of abstraction through powerful framework IP.

Where the innovation is made will make all the difference. Will embedded systems use Platform FPGAs, dedicated microprocessors, or DSPs? With globalization and the Internet; China, India, Russia, and Eastern Europe are producing hundreds of thousands to millions of engineers. Altera has over 30 joint laboratory and training centers in China, but it is not alone as Xilinx and other major semiconductor firms are working to get the next generation of engineers to learn and innovate on their platform. What development platform will win the minds of the next innovators?

Competition is migrating from semiconductor companies solely competing based on their IC based on the platform they offer. Microchip is a successful example of this strategy. When the innovation in the IC slows the innovation moves to the platform; and the efficiency it bequeaths on the end product designer.

The information technology departments and particularly web software developers have discovered and embraced agile project development methodology. Rapidly shrinking product lifecycles are encouraging digital product designers to embrace similar prototype and release agile strategies.

Platform FPGAs as SoC

As chips become more complex their design and manufacturing costs increase dramatically. More requirements require a complex design which produces more functionality to test and debug, and a more complex design triggers lower yields and higher NRE in the manufacturing stage. Embedded systems are being designed around SoC. Industrial, automotive, and consumer electronics devices are increasingly becoming digitized.

Another example of an FPGA SoC is HDTVs. Most HDTV are now designed with a stand-alone FPGA or coupling an FPGA with an ASSP as a coprocessor. These Platform FPGAs include hard-coded DSP blocks, internal memories, and standard IP blocks along with the programmable logic.

High-end convergence consumer devices are a great opportunity for FPGAs. In addition, the growth in internet traffic is will create another round of build-out in the FPGA industry’s sweet spot, telecom and networking.

In 2008 products built around an FPGA will be delivered. What will be new is that for the first time some of these products will be built on an industry-standard soft-core processor architecture from ARM which ARM released in 2007 specifically for FPGAs. Now the huge base of ARM engineers can develop software for embedded systems based on a FPGA system-on-a-chip and use the massive installed base of ARM software and tools. Will adding an ARM processor and its accompanying ecosystem to the FPGA platform be the inflection point for FPGA design wins and the growth that inevitably follows?

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Programmable Logic Market Risks

June 3, 2008, Semiconductors, Tech Investing — Tags: ALTR, ASIC, FPGA, XLNX — @ 2:27 am

This is my last post related to the potential risks to Xilinx and Altera’s continued market dominance in programmable devices and growth into adjacent semiconductor industries in my 14 post piece on investment opportunities in semiconductor design. To summarize the other risks where

Competition from other Platforms
Existing Competitors and new entrants
Competition from ASICs and reliance on the communications sector

The Semiconductor Industry is Cyclical

Due to the .com and telecom bubble PLD sales surpassed economical sense in 2000 and 2001. After bottoming in 2002 PLD sales have grown at a compound annual rate of about 15% and FPGA sales have grown roughly 20% annually. FPGA’s are now 75% of total PLD sales. In 2001, the PLD market peaked at $4.1B and in 2002 bottomed at $2.3B. Since 2002, both Altera and Xilinx have gained market share every year. The PLD market has only recently exceeded the peak experienced in 2001.

It looks like the economy is headed back into a recession, but unlike the 2001 recession, which was business capital spending induced, this recession looks like it will be driven by a drop in consumer spending. This will affect semiconductor sales, but it will not be nearly as dramatic as the drop in 2001. Although some firms may experience financing issues, companies are for the most part well capitalized.

The 2001 recession was caused by a glut in supply of technology products and an over investment in technology oriented startups. The 2008 recession has neither of these characteristics.

In 2001, companies like, Xilinx, Altera, Cisco, EMC, Sun Microsystems, etc sold (and often helped finance) products to startups and other customers in the technology sector whose unprofitable business models caused them to go bankrupt when the market turned down and venture capital investment dried up. These bankrupt or dramatically downsized companies dumped their newly purchased technology products on the market. So not only had demand decreased drastically; supply increased drastically; causing a glut in the market that took years to work through.

This time supply chains have been optimized for just in time product delivery and technology companies’ balance sheets have never been stronger; often in conjunction with record low sales to inventory ratios. While there may be some re-selling of technology equipment in emerging markets it should be minimal compared to what occurred in the telecom and .net bubble of 2001. In addition, within the semiconductor industry, PLD sales should fare better than most since they require less up front risks, such as time and costs.

With rational supply and persistent growth in data storage, networking, and the digitization of industrial components this recession will look much different than the technology led recession of 2001. Recessions also spur new cost cutting or risk reduction strategies. Companies that have solely relied on ASICS or generic PC architectures may explore the benefits of programmable logic.

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Programmable Logic, Communication Sector Dependence

June 2, 2008, Semiconductors, Tech Investing — Tags: ALTR, ASIC, ASSP, FPGA, LSI, XLNX — @ 12:23 am

In the last post two posts on semiconductor design I reviewed the risks to Altera and Xilinx due to competition from other platforms, existing competitors, and new entrants. Here I’ll review the risks from reliance on the communication sector (which may finally be a strength for the first time since early 2000) and from ASIC vendors.

Competition from Structured ASICS and ASSP’s

In March 2006, LSI Logic, the first vendor to create a structured ASIC, closed its RapidChip division exiting the structured ASIC business. This was a blow to the EDA vendors who haven’t seen significant growth since the 2001 downturn and have struggled to gain a foothold in the FPGA industry. By shuttering its structured ASIC division LSI conceded that customers are moving to FPGA’s for new products as it is much faster and more economical to initially design a Xilinx (or Altera) FPGA and migrate to the same vendor’s structured ASIC in volume, than design using LSI’s ASIC-based process.

In 2001, Altera introduced their HardCopy® structured ASIC platform and they are now a leader in the structured ASIC market. Altera has a straightforward migration path from FPGA to structured ASIC. They maintain compatibility with the FPGA architecture, but reduce the die size by removing the configuration circuitry, programmable routing, and programmability for logic and memory with fixed wired interconnect. Xilinx has a similar product called EasyPath®.

Reliance on Communications Sector

In 2000, over 80% of PLDs went into communications related equipment. Today that number is just under 50% of sales and steadily dropping. Since 2000 the growth in PLDs for communications end products has significantly trailed other end markets.

In fact, if the growth in the communication sector picks up, like we think it will in 2010 or 2011, this could be a major boost to the PLD market. The other end market segments like storage, industrial, and consumer electronics should continue to see strong growth over the next decade.

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Semiconductor Design Platform Competitors

May 31, 2008, Semiconductors, Tech Investing — Tags: ACTL, ALTR, ARMH, ASIC, FPGA, LSCC, XLNX — @ 6:33 pm

In the last post I reviewed the risks to Altera and Xilinx due to competition from other platforms. In this post I’ll review the risks from existing competitors and new entrants.

PLD Market: Existing Competitors Gain Momentum

Actel with 6% market share has a strong niche in anti-fuse FPGAs (one time programmable) and in flash based FPGAs. Flash based FPGAs is a segment Xilinx and Altera have stayed away from, but February 2007 Xilinx’s introduced a flash-based Spartan-3AN and was named to EDN’s Hot 100 Products of 2007.

There have been many new entrants with Flash based FPGAs in recent years as venture capitalists and entrepreneurs may feel more compelled to compete in a corner of the market not dominated by one of the two industry leaders. Flash-based FPGAs have entering several new markets end markets and they may actually grow faster than the more traditional SRAM-based FPGAs.

Actel began shipping a Flash based FPGA in 1999 and they appear to currently have a strong leadership position in this good niche area of the FPGA market. Actel has a deal with ARM for putting soft versions of ARM7 processors in Actel’s non-volatile flash-based FPGAs. Altera recently began offering FPGAs that also support ARM processors.

Flash benefits from being non-volatile (e.g. it doesn’t need power to maintain the chip’s data), but SRAM devices will always be faster. Unlike SRAM based FPGAs, Flash based FPGAs do not have to be booted by an external device to load the software so they are more of a true single chip solution comparable to ASICs (related to power requirements and the number of components in circuit board design).

Lattice Semiconductor with 7% market share has made acquisition to attempt to increase its share in the PLD market. Having these diverse PLD software development platforms for its various acquisitions has been a disadvantage. In 2001, Lattice’s division Vantis and Agere (at the time Lucent) gave it a 25% market share in the PLD market. Lattice is strongest in the slower growing CPLD segment where it is number three in market share after being over taken by Xilinx in 2007 for the number two position. Altera is number one in CPLD market share.

QuickLogic with 1% market share targets specific applications (similar to ASSP’s) and is strong in power sensitive markets.

PLD Market: New Entrants

Newer companies such as ChaoLogix, Stretch, and Cswitch are entering the programmable logic space and trying to create a disruptive, game changing technology.

A big problem for start-ups and other semiconductor companies entering the programmable logic market is place and route tooling software, where Xilinx and Altera’s design platforms are dominant. Roelandts the CEO of Xilinx has stated that “there is no 3rd party place and route software; place and route software at Xilinx runs to 20 million lines of code.” A new company also runs into the problem that initially no one knows its development platform and the lack of IP available for the startups chips.

A larger better funded player like Intel, IBM, or Texas Instruments enters the market. With the Geneseo project Intel and IBM opened sourced what could have been a competitive advantage for them (discussed in a couple pages). A risk could be a strong player like Texas Instruments, with its current powerful position in analog and DSP, purchasing Actel to get a foothold in the PLD market.

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Risks for Semiconductor Design Platforms

May 26, 2008, Semiconductors, Tech Investing — Tags: ADI, ALTR, ARMH, FPGA, INTC, MCHP, TXN, VIMC, XLNX — @ 6:20 pm

In the next four blog posts on the next generation of semiconductor design I will go over the potential risks to Xilinx and Altera’s platform. In this post I’ll review the risks stemming from potential competition from other platforms.

Who has the best platform for the next generation of semiconductor devices: Intel, TI, IBM, Xilinx, Altera, ARM Holdings, Analog Devices, Microchip Technology, etc? What platform will large companies and entrepreneurs use to build the next generation of products?

One-time programmable processors are one source of competition for embedded system solutions; with Microchip Technology’s programmable microcontrollers and TI’s DSP platform.

Many entrepreneurs love Microchip Technology’s one time programmable processors and their straightforward API. Microchip has roughly a 50% market share for 8-bit processors and over 90 of its microcontrollers ship with some analog component. It also ships a microcontroller with flash memory. It has built a good developer community with over 3,000 embedded designers attending its’ thirteen separate 2007 conferences held in four different languages in seven countries.

It released a 16-bit product in 2003 and a 32-bit product in December of 2007; which both use the same development tools as it’s widely used 8-bit version. Microchip is the only microcontroller vendor supporting 8-bit, 16-bit, and 32-bit products on one development environment. Its 32-bit microcontroller, the PIC32 Family, uses the MIPS the MIPS architecture and was on EDN Magazine’s prestigious list of “Hot 100 Products of 2007″.

Microchips generic processors will never come close to the performance of PLDs, but it should continue to see success in products with lower performance requirements.

ARM Holding’s processors are the dominant processor for mobile phones and the most widely-used 32-bit microprocessor family with over 75% of all 32-bit embedded CPUs. Arm processors are soft core IP designs that can be embedded in ASICs or FPGAs and are really complimentary to hardware provider’s offerings.

Intel’s x86 processor has a large community, but an inherently slow architecture that has not seen very much success outside of the mainstream PC and server marketplace. Intel is creating a multi-purpose “programmable Intel architecture machine” called Larrabee for high-performance computing and discrete graphics. Larrabee will be Intel’s first “many-core” product” and is expected to be available in 2010. It is debatable how competitive this device will be with the devices in the market two years from now. In the meantime, how much embedded systems market share can the PLD vendors capture?

Texas Instruments‘ is the leading DSP platform with over 50% market share and is also a leading player in the high performance analog chip market. TI risks losing market share from several diverse competitors nipping at its heals such as platform PLDs targeted at DSPs and mixed signal devices, lower end device providers from China such as Vimicro incorporating custom and 3^rd party IP, end market specific mixed signal competitors such as Sigma Design’s DSP, and finally seeing competition for its single chip mobile phone solution (integrated application processor, baseband, and support pieces).

Analog Devices nascent and somewhat beleaguered DSP processor platform Blackfin has some strong advocates and Microsoft’s .Net Micro Framework, which is targeted at embedded systems, was recently ported to Blackfin; increasing the toolset available for devices built around Blackfin

A 3rd party EDA tools vendor may develop a strong integrated meta-platform that can act as a neutral party and potentially support building devices on top of several different vendor’s platforms. Granted this sounds more like a pipe dream.

While Altera and Xilinx have great platforms with strong communities there are concerns that that the business model for intellectual property (IP) is poorly positioned. A considerable amount of IP is given away by the FPGA vendors which undercuts some potential IP vendor’s offerings. The FPGA vendors will have to regulate themselves to providing the framework IP allowing 3^rd party IP companies to provide important add on intellectual property.

As with any company developing a platform there are conflicts of interest that must be adroitly managed. Battles for platform supremacy often have winner take all outcomes with all other competitors left as niche players. The next decade will see further consolidation around very few design platforms.

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Programmable Logic Development Platforms

May 23, 2008, Semiconductors, Tech Investing — Tags: ALTR, ASIC, FPGA, IP core, XLNX — @ 4:09 am

Xilinx and Altera have solid software design platforms that customers use to program their chips. The dynamics of the PLD industry give the top players competitive advantages due to the platform they each have created. Each platform has built a strong moat based on the number of integrated circuit design engineers that understand it (and whose careers are based on this knowledge) and the amount of intellectual property available.

Thousands and thousands of engineers make their living because of the knowledge and expertise they have of the development platforms they use. Switching costs are high for engineers to learn new design frameworks. In addition, thousands more engineers learn Xilinx and Altera’s development tools every year in colleges in the USA, India, China, and the rest of the world.

Most PLD’s are built using Xilinx or Altera’s development platform where they can also use thousands of IP cores (re-usable intellectual property) built by Xilinx or Altera (depending on whose platform you are using) and offered for free (or nearly free). Their platforms also support 3rd part IP cores.

Each company plus dozens of third party companies build re-usable components (IP cores) that increase engineers’ efficiency. For ASICs, the largest impediment to IP reuse is verification, which can consume 70% of the development cycle. With FPGAs reuse is easier as the FPGA vendors pre-verify 3rd party vendors IP.

The success of a design platform largely depends on the quality of the IP building blocks. A huge advantage that the PLD firms have over the EDA firms is a much easier migrating path from one manufacturing process to the next. This allows IP cores to be easily rolled into the next generation architecture.

The ASIC market has struggled to embed and verify 3^rd party IP. With Xilinx and Altera offering end-to-end design capabilities from design tools to IP cores, including free IP cores and a marketplace for 3^rd party IP cores, they are creating an ecosystem where the customer’s have one neck to choke when problems arise. Creating an environment similar to IT departments’ migration to a single primary provider (Microsoft, Oracle, IBM, or SAP) so they can have a primary partner to lean on when issues arise.

PLD’s allow IP cores to be embedded at the software level, not in the hardware. This simplifies the process so IP can be tested and verified by the supplier on a finite number of chips since FPGA’s are a common single chip manufactured in volume by the fab; as opposed to ASIC’s whose physical design is dictated by the IP cores themselves.

A behavioral change is needed to design embedded systems and programmable chips offer a different development paradigm. The Internet and web programming could never have moved as fast as it had if websites had to be bug-free when first released, a requirement for ASICs.

Having IP that is available, certified, and supported is a necessity. Programmers on the Java EE and .Net platforms are offered thousands of tested and supported libraries. This is a basic requirement of any enterprise development platform. IP sub-systems (objects) must offer easily understandable interfaces (API’s) that allow the designer to focus only on integration and their designs differentiating factor.

A serious question mark is how can EDA vendors build an evolvable design platform incorporating IP cores that can subsist across multiple ASIC generations. FPGA’s allow the platform to be based on single chip architecture, similar to how the x86 platform enabled the emergence of the PC.

Every year more IP cores are built and more engineers learn these two companies’ platforms. It would be hard for new entrants to overcome the platform network effects that have been built by Xilinx or Altera. It would be nearly impossible for a startup PLD company to compete with this breadth of knowledge. The ability of Xilinx and Altera to build developer ecosystems may eventually trump all but the highest end digital and mixed signal chips.

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Programmable Logic Leaders - Xilinx & Altera

May 20, 2008, Semiconductors, Tech Investing — Tags: ALTR, FPGA, XLNX — @ 2:23 am

Xilinx has a customer base more diverse across industries and while Xilinx’s competing chips often offer better performance Altera has won several recent design wins because of its focus on lower power (and correspondingly better battery life). Both use a fabless model which keeps capex requirements low and taxes low, due to products being manufactured overseas. Both companies have high margins, no debt, and around $1B in cash.

Company	Symbol	Mkt Cap	Net Cash	2008 P/E	2007 P/CF	ROE	Net Margin	Yield	Growth
Xilinx	XLNX	$7B	$1B	15	14	21	20	2%	15%
Altera	ALTR	$6B	$1B	16	25	24	23	1%	15%

The leading PLD vendors will stay at the cutting edge of manufacturing processes. When a fab begins a new, smaller fabrication process they like to use PLD’s as one of the first chips they manufacture because they are high volume with relatively straight forward manufacturing designs. Setting up the fabrication process for microprocessors and ASICs are much more difficult, and getting more and more difficult with each new smaller geometry. The latest FPGA products are at least one or two generations ahead of any ASIC products. It is a safe bet that Xilinx and Intel will both remain at the cutting edge in manufacturing processes.

Xilinx Overview

Founded in 1984 and public since 1990, at $.83 a share when adjusted for splits. Every year for the past decade Xilinx has generated positive free cash flow, including in 2001 and 2002. It has a global customer base of over 21,000 customers (top 15 customers account for 33% of sales). It sources semiconductor wafers form multiple suppliers.

Xilinx has a little over 50% share of the PLD market. It is the 3rd largest company in the overall logic market. In 2007, a survey of semiconductor customers ranked Xilinx, for the first time, as the most important vendor, ahead of IBM or Intel. Over the past decade it has slowly been moving up the list on this survey.

Xilinx’s Virtex FPGA’s can include up to two embedded IBM PowerPC cores, offering embedded system designers the ability to build a system-on-a-chip capable of running an embedded OS like Linux. It has been making solid progress in the high performance DSP market as well as the embedded processor market. It offers an embedded development kit based on the Eclipse framework.

Xilinx currently trades at an opportunistic valuation with a 2008 P/E of less than 15. It has a ROE and net margin around 20. Including investments and subtracting a billion dollar convertible the company has a net cash position of one billion. This cash position has been shrinking as the company buys back shares. I have modeled revenue growth of 12% and earnings growth of 15% (due to share buybacks and margin improvements) over the next five years. Altera’s valuation is very similar.

Altera Overview

Altera was founded in 1983 and has been public since 1989. It has a global customer base of over 14,000 electronics equipment makers. It uses a single source, Taiwan Semiconductor, for its semiconductor wafers; subjecting the company to any potential production issues incurred by Taiwan Semiconductor.

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